.ALIASES
X_U10           U10(NODEMINUS=CT NODEPLUS=0 PLUS=CLOCK MINUS=0 ) CN @CHAPTER 4.Astable
+generator(sch_1):INS736266@APPLICATION.SWHYSTE.Normal(chips)
X_U11           U11(NINV=CT INV=N736919 OUT=CLOCK ) CN @CHAPTER 4.Astable
+generator(sch_1):INS736315@APPLICATION.COMPARHYS.Normal(chips)
V_V1            V1(+=N736919 -=0 ) CN @CHAPTER 4.Astable generator(sch_1):INS736801@SOURCE.VDC.Normal(chips)
I_I1            I1(+=0 -=CT ) CN @CHAPTER 4.Astable generator(sch_1):INS736342@SOURCE.IDC.Normal(chips)
C_C1            C1(1=0 2=CT ) CN @CHAPTER 4.Astable generator(sch_1):INS736389@ANALOG.C.Normal(chips)
_    _(clock=CLOCK)
_    _(Ct=CT)
.ENDALIASES
